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Thursday, August 20 • 11:15am - 12:00pm
ARM: Caches that give you enough rope to shoot yourself in the foot - Marc Zyngier

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The ARM architecture allows for a wide variety of cache configurations, levels and features. This enables building systems that will optimally fit power/area budgets set for the target application. A consequence of this is that architecturally compliant software has to cater for a much wider range of behaviours. Enter virtualization and nested page tables, KVM and QEMU, IO coherency (or lack thereof), legacy code, and what you thought you understood of the above becomes even more mind boggling. This presentation will give an overview of how caches behave in the ARM architecture, especially in the context of virtualization. It will discuss various challenges that we have seen with KVM and how they have been solved. It will also outline some of the areas where previous assumptions made by the entire KVM software stack break down on architectures that do not mandate full coherency.

avatar for Marc Zyngier

Marc Zyngier

Software Engineer, ARM Ltd
Marc Zyngier has been toying with the Linux kernel since 1993, and has been involved over time with the RAID subsystem (MD) and all kinds of obsolete architectures (by maintaining the EISA bus). He also messed with consumer electronics, and now co-maintains KVM on ARM(64) as well as some of the IRQ infrastructure (irqchip, irqdomain).

Thursday August 20, 2015 11:15am - 12:00pm
Cedar Room

Attendees (9)